Conventional radios which detect high frequency RF signals, above 300 MHz for example, or otherwise generate high frequency signals often consume great amounts of power, require a large amount of space, require excessive amounts of individual alignment, are excessively expensive, and suffer from reduced reliability. These problems result, at least in part, from the generation of local oscillator or other oscillation signals at high frequencies.
For example, frequencies of signals used in these applications must often be multiplied by factors in the range of 25-200. One conventional technique for accomplishing the multiplication is through the use of a cascade of step recovery diode multipliers, each of which multiply by a factor of around 2-15. Such multipliers can require up to 16 cubic inches in volume and consume an excess of 2 Watt of power. Another conventional technique for accomplishing the multiplication is through the use of a phase locked loop which requires less space but still requires high power, high speed frequency dividers.
Both of these techniques produce narrow band output signals. With a cascade of step recovery diodes, each cascaded stage must be carefully aligned for operation at a single output frequency, and filters in each stage must be individually tuned to reject undesired harmonics. With a phase locked loop, the tuning range of a voltage controlled oscillator limits the frequency range producible, and this tuning range is typically minimized to reduce phase noise. The need for individual alignment in devices which operate at high frequencies drives up costs by introducing costly manufacturing steps and by introducing opportunities for mistakes and errors in workmanship.
As discussed below, sample and hold circuits may be used in solving at least some of the problems posed by radios which operate at high frequency. An extensive body of technology has developed around utilizing sample and hold circuits in the digital reconstruction of analog signals. Since the majority of this technology requires sampling to occur at a rate which is typically greater than twice the frequency of the signal being sampled, a need has always existed for higher speed sample and hold circuits.
Nevertheless, the performance of conventional sample and hold circuits operating at high frequency microwave RF rates has remained poor. For example, acquisition time and acquisition accuracy have often been too poor to permit the use of sample and hold circuits at higher RF frequencies in any application other than those requiring only very narrow output bandwidths, such as phase detector applications. Moreover, non-linearities in critical parameters, such as hold capacitance, become severe handicaps at higher RF frequencies.